Since the gate terminal of FET (T1) can be regarded as an open circuit, the input impedance of the circuit is equal to the value of VR1. The value of VR1 is specified as 1-megaohm. The input signal is coupled to volume control VR1 via capacitor C1. The driver section is built around transistor BC639 (T3) while the output section is built around transistors BD139 and BD140 (T4 and T5). The amplifier section is built around JFET VHF/UHF amplifier 2N5484 (T1) and NPN transistor BC548 (T2). ![]() 2 shows the amplifier, driver and output sections.
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